LD *AR1+, A || MAC *AR2-, B;
Before Instruction After Instruction
A 00 0000 0000 A ()
B 00 0000 1000 B ()
T 0100 T 0100
AR1 0030 AR1 ()
AR2 0040 AR2 ()
Data Memory
0030H 2345 0030H 2345
0040H 5432 0040H 5432
MAC *AR5+,A
Before After
A 00 0000 1000 A ()
T 0400 T 0400
FRCT 1 FRCT 1
AR5 0100 AR5 0101
Data Memory
0100h 1234 0100h 1234